16-bit two-channel 500MSPS ADC with LVDS interface and up to 32768x decimation

The ADC3668 and ADC3669 (ADC366x) are a 16-bit,

250MSPS and 500MSPS, dual channel analog to

digital converters (ADC). The devices are designed

for high signal-to-noise ratio (SNR) and deliver a

noise spectral density of −160dBFS/Hz

(500MSPS).

The ADC366x includes an optional quad band digital

down-converter (DDC) supporting wide band decimation by 2 to narrow band decimation

by 32768. The DDC uses a 48-bit NCO which supports phase coherent and phase

continuous frequency hopping.

The ADC366x is outfitted with a flexible LVDS

interface. In decimation bypass mode, the device uses a 16-bit wide parallel DDR

LVDS interface. When using decimation, the output data is transmitted using a serial

LVDS interface reducing the number of lanes needed as decimation increases. For high

decimation ratios, the output resolution can be increased to 32-bit.

The power efficient ADC architecture consumes 300mW/ch at 500MSPS and provides power scaling with lower sampling rates (250mW/ch at 250MSPS).