Octal edge-triggered D-type flip-flops with three-state outputs & integrated level translation

The SN74LV8T574 contains eight D-type flip-flops. All

channels share a latch enable (LE) input and output

enable (/OE) input. This device has a flow-through

pinout which allows for easier bus routing.

The input is designed with a reduced threshold circuit

to support up translation when the supply voltage

is larger than the input voltage. Additionally, the 5V

tolerant input pins enable down translation when the

input voltage is larger than the supply voltage. The

output level is always referenced to the supply voltage

(VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS

levels.