CY7C2663KV18-550BZXI

CY7C2663KV18-550BZXI is a 144-Mbit QDR II+ synchronous pipelined SRAM in an 8M × 18 organization. It uses separate read and write ports with DDR signaling (data at 1100 MHz from a 550 MHz clock) and a four-word burst with 2.5-cycle read latency. The device operates from 1.7 V to 1.9 V core and 1.4 V to VDD I/O, includes on-die termination and JTAG 1149.1, and comes in a 165-ball FBGA package.