CY7C1470BV33-167AXI

CY7C1470BV33-167AXI is a 72-Mbit synchronous pipelined burst SRAM (2M × 36) with No Bus Latency (NoBL) architecture for zero wait-state back-to-back reads and writes. It runs from a 3.3 V core supply with 3.3 V/2.5 V I/O and supports 167 MHz bus operation. Fully registered inputs/outputs, byte-write via BW[a–d], linear or interleaved bursts (up to 4), and ZZ sleep mode simplify high-throughput buffering.