CY7C1380KV33-167AXI

CY7C1380KV33-167AXI is an 18-Mbit pipelined synchronous SRAM organized as 512K × 36 with registered inputs/outputs for 3-1-1-1 burst accesses and single-cycle chip deselect. It supports bus operation up to 167 MHz with 3.4 ns max access time. The device uses 3.135 V to 3.6 V VDD and 2.375 V to 2.625 V or 3.135 V to VDD I/O supply, includes IEEE 1149.1 JTAG boundary scan, and offers a ZZ sleep mode.