Automotive 8-bit shift registers with 3-state output registers

The SN74LV595A-Q1 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear ( SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except Q H’ are in the high-impedance state.

The device is fully specified for partial-power-down applications using I off. The

I off circuitry disables the outputs, preventing damaging

current backflow through the device when it is powered down.