Sample

Up to 1 GHz Dual-SHARC+ DSP with 2x 640KB L1, 2048KB Shared L2 SRAM

... SHARC+ core include cache enhancements and branch ...

Sample

Arm Cortex-M33-based Microcontroller with 8KB Cache

The LPC553x/S3x MCU family further expands the ...

Sample

Up to 800 MHz SHARC+ DSP w/ Integrated Arm Cortex-A5

... SHARC+ core include cache enhancements and branch ...

Sample

196 HVC ENYCAP™ Hybrid Energy Storage Capacitors

... failure and write cache protection for enterprise ...

4K X 4 CACHE TAG RAM

32K X 18 CACHE RAM

16K X 15 CACHE BICMOS Cache-Tag SRAM

512K PB SRAM L2 CACHE 11

256KB CACHE MODULE

256KB ASYNC CACHE MODULE

128KB CACHE MODULE

512KB ASYNC CACHE-APPLE

KSZ8695

... (MMU) and 8KB I-cache and 8KB dCache. Shared ...

KSZ8695

... (MMU) and 8KB I-cache and 8KB dCache. Shared ...

KSZ8695

... (MMU) and 8KB I-cache and 8KB dCache. Shared ...