4T2R Direct RF Transmitter and Observation Receiver

The AD9986 is a highly integrated device with a 16-bit, 12 GSPS maximum sample rate RF DAC core, and a 12-bit, 6 GSPS rate RF ADC core. The AD9986 supports four transmitter channels and two receiver channels with four transmitter, two receiver (4T2R) configuration. The AD9986 is well suited for 2-antenna and 4-antenna transmitter applications requiring a wide bandwidth observation receiver path for the digital predistortion. The AD9986 supports up to a 6 GSPS complex transmit and receive data rate in single channel mode. The maximum radio channel bandwidth supported is 1.2 GHz and 2.4 GHz for the transmit and receive paths, respectively (4T2R). The AD9986 features a 16 lane, 24.75 Gbps JESD204C or 15.5 Gbps JESD204B serial data port, an on-chip clock multiplier, and digital signal processing capability targeted at multiband, direct-to-RF radio applications.

APPLICATIONS

* Wireless communications infrastructure

* W-CDMA, LTE, LTE-A, Massive-MIMO

* Microwave point-to-point, E-band, and 5G mm Wave

* Broadband communications systems

* DOCSIS 3.1 and 4.0 CMTS

* Communications test and measurement system

* Flexible reconfigurable radio common platform design

* Transmit/receive channel bandwidth up to 1.2 GHz/2.4 GHz (4T2R)

* RFDAC/RFADC RF frequency range up to 7.5 GHz

* On-chip PLL with multichip synchronization

* External RFCLK input option

* Versatile digital features

* Configurable digital up/down conversion (DDC and DUC)

* 8 fine complex DUCs and 4 coarse complex DUCs

* 8 fine complex DDCs and 4 coarse complex DDCs, 2 independent

* 48-bit NCO per DUC/DDC

* Programmable 192-tap PFIR filter for receive equalization

* Supports 4 different profile settings loaded via GPIO

* Receive AGC support

* Fast detect with low latency for fast AGC control

* Signal monitor for slow AGC control

* Dedicated AGC support pins

* Transmit DPD support

* Programmable delay and gain per transmit data path

* Coarse DDC delay adjust for DPD observation path