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Low Power 400MH Blackfin+ Embedded Processor with 512KByte L2 SRAM & DDR2/LPDDR Interface

Analog Devices

This device is a member of the ADSP-BF70x Blackfin Digital Signal Processor (DSP) product family. The new Blackfin+ processor core combines dual-MAC 16-bit, 32-bit MAC and 16-bit complex MAC in to a state-of-the-art signal processing engine. It also combines advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities within a single instruction-set architecture. Further new enhancements to the Blackfin+ core add cache enhancements, branch prediction and other instruction set improvements—all while maintaining instruction set compatibility to previous Blackfin products.

The processor offers performance up to 400 MHz, as well as lowest power consumption at <100mW. Produced with a low-power and low-voltage design methodology, they provide world-class power management and performance.

By integrating a rich set of industry-leading system peripherals , large on-chip memory & a high speed external memory interface, this Blackfin processor is the platform of choice for next-generation applications that require RISC-like programmability, multimedia support, and leading-edge signal processing in one integrated package. These applications span a wide array of markets, from automotive systems to embedded industrial, instrumentation, video/image analysis, biometric and control applications.

* Blackfin+ core with up to 400 MHz performance

* Dual 16-bit or single 32-bit MAC support per cycle

* 16-bit complex MAC and many other instruction set enhancements

* Instruction set compatible with previous Blackfin products

* On-Chip Memory

* 136KB L1 SRAM with multi-parity-bit protection (64KB instruction, 64KB data, 8KB scratchpad)

* 512KByte on-chip L2 SRAM with ECC protection

* L3 interface providing 16-bit interface to DDR2 or LPDDR SDRAM devices (up to 200 MHz)

* Key Peripherals include

* USB2.0 HS OTG

* 2x CAN2.0B

* ePPI Video I/O

* 2x SPORTs (w/I2S)

* 2xQuad-SPI / 1xDual-SPI (w/ Host mode option)

* I2C

* 2xUART

* SD/SDIO/MMC (8-bit)

* 4-ch 12-bit 1MSPS ADC

* Security and one-time-programmable memory

* Crypto hardware accelerators for fast secure boot/IP protection

* memDMA encryption/decryption for fast run-time security

* Low-cost packaging

* 184-Ball CSPBGA package (12 mm × 12mm × 0.8mm pitch), RoHS compliant

* Low system power with < 100 mW at 400 MHz (< 0.25 mW/MHz) at 25°C TJUNCTION

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