SY100EP111

The SY100EP111U is a high-speed, low skew 1-to-10 differential fanout buffer designed for clock distribution in new, high-performance systems. The internal 2:1 MUX allows the input to select between two differential clock sources. The device is specifically designed for low skew. The interconnect scheme and metal layout are carefully optimized for minimal gate-to-gate skew within the device. Wafer characterization and process control ensure consistent distribution of propagation delay from lot to lot.