TEENSY 4.1 Teensy 4.1, USB, without header

The new Teensy 4.1 has a 600 MHz ARM Cortex-M7 processor, an NXP iMXRT1062 chip, four times the flash memory of the Teensy 4.0 and two additional memory slots for memory expansion. It has the same size and shape as the Teensy 3.6 (2.4 x 0.7 inches) and offers greater I/O capability, Ethernet PHY, SD card socket and USB host connection. When operating under full load, the Teensy 4.1 requires approximately 100 mA of current and offers support for dynamic clock scaling.

Technical details - ARM Cortex-M7 at 600 MHz - 1024 K RAM (512 K are tightly coupled) - 128 Mb Flash (64K reserved for recovery & EEPROM emulation) - USB host port - 2x additional flash memory slots - 3x CAN bus (1 with CAN FD) - 2x I2S Digital Audio - 1x S/PDIF Digital Audio - 1x SDIO (4 bit) native SD - 3x SPI, all with 16 word FIFO - 3x I2C, all with 4 byte FIFO - 7x serial, all with 4 byte FIFO - 32x general purpose DMA channels - 31x PWM pins - 40x digital pins, all interrupt capable - 14x analog pins, 2 ADCs on chip - Cryptographic acceleration - Random number generator - RTC for date/time - Programmable FlexIO - Pixel processing pipeline - Peripheral cross triggering - Ethernet PHY - microSD card socket - Power management on/off

Further detailed information can be found in the data sheet under "Data sheets" or on the manufacturer's website https://www.pjrc.com/teensy/