3-to-8 line decoder, demultiplexer with address latches; inverting

The 74HC137 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features a latch enable (LE) and two output enable (E1, E2) inputs. A LOW on LE causes the device to act as an active LOW decoder. A LOW-to HIGH transition on LE stores the data that was present before the transition in the latches. Further address changes are ignored as long as LE remains HIGH.

The output enable inputs control the state of the outputs independently of the address inputs or latch operation. All outputs will be HIGH unless E1 is LOW and E2 is HIGH.

Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.