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Octal D-type latches with 3-state outputs and integrated level translation

Texas Instruments

Octal D-type latches with 3-state outputs and integrated level translation RSS Sample
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MPN:
SN74LV8T373
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The SN74LV8T373 contains eight D-type latches. All channels share a latch enable (LE) input and output enable (OE) input.

The input is designed with a reduced threshold circuit to support up translation when the supply voltage is larger than the input voltage. Additionally, the 5V tolerant input pins enable down translation when the input voltage is larger than the supply voltage. The output level is always referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.

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