ZL80132B

The ZL80132B is a feature-rich network synchronization solution with two independent DPLL clock channels and three additional DPLLs for NCO Hybrid, Split XO, and redundant oscillator modes. It also includes five extremely low-output jitter synthesizers. With new features such as ePPS, fast boot, partial reset, per-input DPLL settings, cascading DPLL, and NCO holdover, this solution is ideal for server-based 5G DU/CU applications, supporting GPS/GNSS synchronization. The part can be used on a motherboard, M.2 daughter card, OCP daughter card, or PCIe daughter card.

We also have the ePPS Timebuffer ZL80640B and the ePPS buffer ZL40268 to form a full timing solution for OCP and traditional 5G networks.