Radiation-hardness-assured (RHA), QMLV, 300-krad, 18-bit, 2-channel 65MSPS low-latency low-power ADC

The ADC3683-SP is a low latency, low noise, and ultra low power 18-bit 65MSPS high-speed dual channel ADC. Designed for best noise performance, the ADC delivers a noise spectral density of −160dBFS/Hz combined with excellent linearity and dynamic range. The ADC3683-SP offers DC precision together with IF sampling support to enable the design of a wide range of applications. The low latency architecture (as low as 1 clock cycle latency) and high sample rate also enable high speed control loops. The ADC consumes only 84mW/ch (1/2-swing enabled) at 65Msps and the power consumption scales well with sampling rate.

The device uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device also integrates a digital down converter (DDC) to help reduce the data rate and lower system power consumption. The ADC3683-SP is pin-to-pin compatible with the 14-bit, 125MSPS, ADC3664-SP. The device comes in a 64-pin CFP package (10.9mm x 10.9mm), and supports a temperature range from −55°C to +125°C.