MCP16701

The MCP16701 is an optimally integrated PMIC compatible with Microchip's eMPUs (Embedded Microprocessor Units), requiring Dynamic Voltage Scaling (DVS) with the use of High-Performance mode (HPM). It is compatible with PIC64GX, PolarFire and PolarFireSoC which are supported by dedicated device variants that optimize the solution BOM.

The MCP16701 integrates eight DC-DC Buck regulators and 4 LDOs, and provides a comprehensive interface to the MPU, which includes an interrupt flag and a 3.4 MHz I2C interface. All Buck channels can support loads up to 1.5A, can be paralleled and are 100% duty cycle-capable. Four 300 mA LDOs are provided such that sensitive analog loads can be supported. . Both buck and LDO output voltage settings can be programmed from 0.6V to 1.6V in 12.5mV increments. The voltage selection set allows easy migration across different generations of memory. The default power channel sequencing is built-in according to the requirements of the MPU. A dedicated pin (LPM) facilitates the transition to Low-Power modes and the implementation of Backup mode with DDR in self-refresh (Hibernate mode). The MCP16701 features a low no-load operational quiescent current and draws less than 10 μA in full shutdown. Active discharge resistors are provided on each output. All Buck channels support safe start-up into pre-biased outputs.