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Ultra-low power, 2:8 fan-out buffer with universal inputs and outputs

... universal outputs (HCSL, LVDS, or LVCMOS) with ...

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3.1-GHz differential clock buffer/level translator with 4 configurable outputs

... configured as LVPECL, LVDS, or HCSL drivers ...

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3.1-GHz differential clock buffer/level translator with 6 configurable outputs

... configured as LVPECL, LVDS, or HCSL drivers ...

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3.1-GHz differential clock buffer/level translator with 8 configurable outputs

... configured as LVPECL, LVDS, or HCSL drivers ...

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Dual clock distribution

... differential outputs: LVPECL, LVDS and LVCMOS (2 ...

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Low jitter, 2-input selectable 1:12 universal-to-LVDS buffer

... 12 pairs of differential LVDS clock outputs (OUT0 ...

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Low jitter, 2-input selectable 1:12 universal-to-LVPECL buffer

... The inputs can be LVPECL, LVDS, or LVCMOS/LVTTL ...

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1.6-GHz high performance clock buffer, divider, and distributor with 8 LVDS outputs

The LMK01000 family provides an easy way to divide ...

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1.8-V 1-to-10 high performance differential clock buffer

... outputs are compatible with LVDS receivers if they ...

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1-to-10 LVDS clock buffer up to 1100-MHz with minimum skew for clock distribution

... pair of differential LVDS clock inputs (either ...

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1:8 LVTTL to M-LVDS repeater

... comply with the M.LVDS standard (TIA/EIA-899 ...

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1:8 LVDS clock fanout buffer

... this device, and the LVDS signaling technique, is ...

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1:16 LVDS clock fanout buffer

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1:4 LVDS clock fanout buffer

... of a family of LVDS repeaters. A brief overview ...

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1 LVTTL:4 LVDS clock fanout buffer

... of a family of LVDS repeaters. A brief overview ...