Sample

Very Low Power Video Decoder

... input) and is line-locked for correct pixel ...

Sample

Ultralow Power NTSC/PAL/SECAM Video Decoder w/Robust Sync Detector

... input) and is line-locked. The output formats can ...

Sample

4 Channel Low Power PAL/NTSC/SECAM Video Decoder With Independent Scalers

... input) and is line locked. The output formats can ...

Sample

4 Channel Low Power PAL/NTSC/SECAM Video Decoder with Independent Scalers

... input) and is line locked. The output formats can ...

Sample

Four-Channel NTSC/PAL Video Decoder With Independent Scalers, Noise Reduction, Auto Contrast, and Fl

... 601 clock frequency, line-locked alignment, and is ...

Sample

NTSC/PAL/SECAM/component 10-bit digital video decoder with macrovisionTM detection, 3D-YC/5-line com

... MHz), line-locked for ... ) Line-locked internal ...

Sample

Triple 8/10-bit, 165/110MSPS Video ADC

... horizontal phase-locked loop (PLL) block ...

Sample

Triple 10-Bit 90-MSPS Video and Graphics Digitizer With Horizontal PLL

... horizontal phase-locked loop (PLL) block ...

Sample

Enhanced bipolar phase shifted full bridge controller with selectable UVLO, -40°C to 85°C

... units can be locked together with the operational ...

Sample

Enhanced bipolar phase shifted full bridge controller with selectable UVLO, 0°C to 70°C

... units can be locked together with the operational ...

Sample

x1 PCI Express to 1394b OHCI and 3-port PHY

... an internal phase-locked loop (PLL), which ...

1.8V Phase Locked Loop Differential 1:10 SDRAM Clock Driver

ZL30251

... can produce frequency-locked output frequencies ...

Sample

150 MSPS Wideband (Digital) Receive Signal Processor (RSP)

... . This internal phased-locked loop (PLL) allows ...

Sample

12-Bit, 6 GSPS, JESD204B/JESD204C Dual ADC

... , low phase noise, phase-locked loop (PLL) clock ...